Design Name | top |
Fitting Status | Successful |
Software Version | K.34 |
Device Used | XC2C256-7-TQ144 |
Date | 4-29-2008, 3:37PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
178/256 (70%) | 576/896 (65%) | 109/256 (43%) | 31/118 (27%) | 434/640 (68%) |
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Signal mapped onto global clock net (GCK2) and divided by 10 without phase delay | clk |
Signal mapped onto global output enable net (CDR) reserved | |
Signal mapped onto global output enable net (GSR) | rst |